Projects

Hardware-Software Co-Design

Data analytics is the cornerstone of decision-making in enterprises, and data growth continues on an exponential path—a multi-decade trend showing no signs of stopping. Moore’s Law and Dennard scaling, which previously enabled data analytics platforms to keep pace with growing data volumes, are reaching their physical limits, necessitating a new approach. The Hustle project aims to address this challenge by adopting a co-design approach that considers both software and hardware innovations.

The project has two main focuses. The first examines innovative data organization and query processing algorithms, developing methods aligned with evolving hardware technologies. For example, we ask questions like: When we transitioned from splitting tables in a row-store form to a column-store form, did we stop too soon? Should we continue shredding columns down to individual bits? (The answer appears to be yes — we need to shred further.)

The second aspect focuses on hardware-software co-design. Here, we explore novel hardware abstractions for memory and storage systems aiming to compute data analytics operations closer to data storage locations. While this line of thinking has been around for a while, past work has mainly focused on porting existing software methods to processors near or inside memory/storage subsystems. In contrast, our approach involves a holistic co-design that simultaneously advances both software and hardware, particularly investigating the feasibility of realizing the aforementioned bit-level methods in hardware with minimal area, delay, and power consumption.

People

Publications

  • H. Caminal, Y. Chronis, T. Wu, J. M. Patel, and J. M. F. i, "Accelerating database analytic query workloads using an associative processor," in ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18 - 22, 2022, 2022, pp. 623-637. [PDF] [BIBTEX]
    @inproceedings{DBLP:conf/isca/CaminalCWPM22,
      author = {Helena Caminal and Yannis Chronis and Tianshu Wu and Jignesh M. Patel and Jos{\'{e}} F. Mart{\'{\i}}nez},
      editor = {Valentina Salapura and Mohamed Zahran and Fred Chong and Lingjia Tang},
      title = {Accelerating database analytic query workloads using an associative processor},
      booktitle = {{ISCA} '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18 - 22, 2022},
      pages = {623--637},
      publisher = {{ACM}},
      year = {2022},
      url = {https://doi.org/10.1145/3470496.3527435},
      doi = {10.1145/3470496.3527435},
     }
  • P. V. Sandt, Y. Chronis, and J. M. Patel, "Efficiently Searching In-Memory Sorted Arrays: Revenge of the Interpolation Search?," in Proceedings of the 2019 International Conference on Management of Data, SIGMOD Conference 2019, Amsterdam, The Netherlands, June 30 - July 5, 2019, 2019, pp. 36-53. [PDF] [BIBTEX]
    @inproceedings{DBLP:conf/sigmod/SandtCP19,
      author = {Peter Van Sandt and Yannis Chronis and Jignesh M. Patel},
      title = {Efficiently Searching In-Memory Sorted Arrays: Revenge of the Interpolation Search?},
      booktitle = {Proceedings of the 2019 International Conference on Management of Data, {SIGMOD} Conference 2019, Amsterdam, The Netherlands, June 30 - July 5, 2019},
      pages = {36--53},
      publisher = {{ACM}},
      year = {2019},
      url = {https://doi.org/10.1145/3299869.3300075},
      doi = {10.1145/3299869.3300075},
     }